Hyperstone Helps Global UniChip to Target 2 MegaPixel Digital Still Camera Applications with High Integration Single Chip ASSP Design
Global UniChip, one of the leading SOC design companies in Taiwan, and Hyperstone, the German microprocessor design company, have signed an agreement to license Hyperstone's unified RISC/DSP architecture for use in digital still cameras designs with 2 Megapixel resolution and above.
Global Unichip will implement a highly integrated single-chip digital camera solution as an ASSP (Application-Specific Standard Product) based on Hyperstone's E1-32XS RISC/DSP core. The ASSP design will incorporate all functions required, including image sensor and LCD display interfaces, Video Codec, USB
interface, JPEG compression, and others. The ASSP will be manufactured in a 0.25 um CMOS process technology. Both companies expect that customers will be using this new chip in production volumes starting from Q4 / 2001.
"We have selected Hyperstone's RISC/DSP macro cell architecture because we believe it to be the most cost-effective solution for this application. Of particular interest for Global UniChip is the fact that Hyperstone's well proven RISC/DSP processor cores are already widely used in Taiwan in a number of digital still camera designs produced for the high-volume global market under several well-known brand names," said K.C. Shih, President & CEO of Global UniChip.
Dr. Matthias Steck, Hyperstone's VP Sales & Marketing, commented, "Global UniChip is the ideal SoC partner for Hyperstone. Our customers can now perform a smooth migration from a digital camera design using the stand-alone Hyperstone E1-32XS processor towards a highly-integrated single-chip ASSP solution using our macro cell IP. Global UniChip already has a complete portfolio of additional IP designs, as well as an experienced and powerful design team, both essential elements in the implementation of a successful digital still camera application."
Under the agreement, Hyperstone will deliver its RISC/DSP core as a silicon-proven hard macro in a 0.25 um process, including a programmable bus
interface, 16 kByte memory, and a programmable PLL to provide
software control of the internal clock frequency. The Hyperstone E1-32XS RISC/DSP combines a 32-bit RISC processor with an integrated DSP execution unit implemented as a single-core architecture. As a result, the E1-32XS has a much smaller silicon footprint, less power consumption and lower production costs than the conventional dual core design commonly used in systems requiring both RISC and DSP capabilities.
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Notes for the Editor
Global UniChip
Global UniChip was founded in January 1998 as a dedicated full service SOC Design Foundry. The company provides total solutions from embedded IPs required for SOC, to the challenging and complex tasks of time-to-market SOC design, production, and testing services. Global UniChip's wide range of silicon proven IPs include CPU designs such as RISC/CISC processors and DSP; embedded memory such as DRAM, SRAM, ROM, and FLASH; programmable memory BIST and DFT for SOC; multimedia cores such as JPEG encoder/codec/decoder and NTSC/PAL encoder/decoder; mixed signal cores such as DAC, ADC, PLL, USB and IEEE 1394a transceiver;
Interface cores such as USB and IEEE 1394a device controller.
Global UniChip has over 70 experienced engineers engaged in research, development, and customer support. In addition, the company has cooperated extensively with local universities in joint development of new IPs and SOC technologies. Global UniChip is headquartered in the Hsinchu Science-Based Industrial Park in Taiwan. Support offices will be located in the USA (Silicon Valley), China and Japan in the near future.
Hyperstone - The Processor Architecture
The standard Hyperstone core architecture provides both a fast RISC processor for data and control functions and a powerful DSP unit for efficient algorithm execution-without the silicon overhead, excessive power consumption and
software complexity of a conventional dual-core design. The major advantage of the Hyperstone core is that the RISC and DSP functions are designed as a single processor model and instruction stream, rather than a combination of two different cores on a single piece of silicon.
Hyperstone AG - The Company
Hyperstone AG is a fab-less microprocessor design company, founded in 1990, based in Konstanz, Germany. Staff members have up to 30 years experience in design, production, sales and marketing of computer systems and peripheral devices. Technical development takes place in Germany and Taiwan with sales channels operating through Hyperstone's global network of distributors and representatives (US, Europe, Taiwan, Korea, Japan), serving customers worldwide. Leading silicon foundries in Taiwan provide wafer-subcontracting services.
Editorial Enquiries:
Juergen Pintaske, Marketbroad Communications,
11-15 Dix's Field, EXETER, EX1 1QA, UK
Tel: +44(0)1392-284800
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email:
juergen@marketbroad.com Contact - Global UniChip
Jason Liu, Marketing Department/Deputy Manager
Global UniChip, 2F, No.26, R&D 2nd Rd.,
Science-Based Industrial Park, Hsinchu, Taiwan
Tel: +886-3-5646600, Fax: +886-3-5646000
Email:
info@globalunichip.com Web:
www.globalunichip.com Hyperstone Contact:
Dr. Matthias Steck, VP Sales & Marketing,
Hyperstone AG, Constance, Germany
Tel: +49 7531 980 30, Fax: +49 7531 517 25,
Email:
msteck@hyperstone.de Web:
www.hyperstone.com